Al fin se sabe cuál era el problema que hacía colgar a algunos Athlon y Duron
cuando se usa el AGP. Bug de hardware.
ACTUALIZACIÓN: Alan Cox duda
que afecte a Linux, aunque no sabe del módulo de nvidia. Otros
reportan
problemas si no se usa el agp de nvidia. Andrea Arcangeli tiene otra
explicación: módulos en pruebas usados por Gentoo (preempt y rmap). De acuerdo a Alan y Andrea, el Linux
nunca invalida páginas no alineadas de 4MB, por lo que no podría aparecer el
susodicho bug.
ACTUALIZACIÓN 2: al final se sabe más del problema, con explicación oficial de AMD. Agregado al final de artículo, aunque hay un problema con los AMD, no
sería un bug, sino un problema de coherencia de cache, aunque Dave Miller lo duda.

Salió anunciado en varios lugares, entre ellos Slashdot,
Tuxreports,
y el original en Gentoo Linux.

El bug aparece en todos los kernels que estén compilados para procesadores Pentium
o superiores. El problema aparece con el uso de paginación extendida
(hasta 4 MB) de dichos procesadores copia áreas de memoria en el AGP.

Lo peor de todo es que AMD conoce este bug desde el 21 de setiembre
del 2000, pero sólo lanzó un parche para el
Windows 2000 sin avisar que era un bug del hardware (ver nota de AMD al final).

¿Solución?
Deshabilitar el AGP o agregar el argumento mem=nopentium al LILO o GRUB.

Por supuesto el Quake no irá tan rápido como debería.

Menos mal que me compré un Pentium 3… ya hace tiempo que los hackers del kernel se quejan
de la falta total de soporte por parte de AMD.

Extracto del aviso de AMD

Description of Issue

An issue has been identified that could result in the corruption of video data shared between AGP graphics adapters and AMD Athlon™ or AMD Duron™ processors, including the AMD Athlon™ MP processor when running Microsoft Windows®2000 Professional, Windows®2000 Server, or Windows®2000 Advanced Server. This issue is independent of system chipset and has been observed when running Ziff-Davis 3D Winbench™ 2000 and Mad Onion 3DMark™ 2000 in benchmarking mode. Note: This patch is not needed for Windows XP.

Solution

AMD and Microsoft have worked together to identify a patch that involves adding a key to the registry. To add the key run the registry key installation file below or add the registry key as detailed in Microsoft KnowledgeBase article Q270715. AMD recommends that AMD Athlon™ and AMD Duron™ processor, including AMD Athlon™ MP processor users with AGP graphics adapters running Microsoft Windows®2000 Professional, Windows®2000 Server, or Windows®2000 Advanced Server install this patch.

Como véis, no dice nada que sea un bug del procesador.

Explicaciones
El autor original del reporte en Genoo envío un
mensaje a la lista linux-kernel donde se dan más detalles
del problema y explicación de AMD.

Finalmente, hay un problema pero no es un bug. La creencia que era un bug
del AMD surgió de un programador de NVIDIA que no podía resolver unos
problemas con el AGP.

El problema puede ser resumido como posible problema de coherencia de cache
entre las escrituras especulativas de AMD y el GART.

Explicación de AMD:

This note documents a subtle problem that AMD has seen in the field.
The operating system has created a 4MB translation that has attribute
bits that allow it to be cacheable. GART also contains translations to
part of the underlying physical memory of this 4MB translation.

This situation is fundamentally illegal because GART is non-coherent and
all translations that the processor could use to access the AGP memory
must, therefore, be non-cacheable. Although we have seen no intentional
access to the AGP memory by the processor via the 4MB cacheable
translation we have seen legitimate, speculative, accesses performed by
the processor.

The problem that has been experienced is caused by a speculative store
instruction that is not ultimately executed. The logical address of the
store is through the 4MB translation to physical memory also translated
by GART and used by the AGP processor.

The effect of the store is to write-allocate a cache line in the data
cache and fill that cache line with data from the underlying physical
memory. Because the line was write-allocated it is subsequently written
back to physical memory even though the bits have not been changed by
the processor. This write-back occurs when the cache-line is
re-allocated based upon replacement policy and is far removed in time
from the point at which the bits were read.

Between the time of the read and the time of the write, the AGP
processor has modified the bits in physical memory and the bits in the
data cache are stale. This is happens because GART, being non-coherent,
does not snoop the processor caches for modified data.

When the cache-line eviction occurs the stale data written to physical
memory has fatal side effects.

Our conclusion is that the operating system is creating coherency
problems within the system by creating cacheable translation to AGP
GART-mapped physical memory.

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